Intel engineers Tim Chen and Chen Yu presented their Cache Aware Scheduling work last week at the Linux Plumbers Conference 2025 in Tokyo. This proposed innovation for the Linux kernel aims to improve performance on modern CPUs equipped with multiple last level caches (LLCs). The scheduling mechanism is designed to group tasks that share data into the same LLC domain, which helps to reduce cache misses and cache bouncing. This optimization is expected to deliver better overall system performance. While the kernel patches for Cache Aware Scheduling have not yet been upstreamed, testing has reportedly shown promising results. This initiative is one of Intel's contributions to Linux kernel optimization this year.